FPGA Implementation of Strongly Parallel Histogram Equalization.
Ernest JamroMaciej WielgoszKazimierz WiatrPublished in: DDECS (2007)
Keyphrases
- fpga implementation
- histogram equalization
- image enhancement
- hardware implementation
- contrast enhancement
- transfer function
- image contrast enhancement
- gray level
- gray scale
- image contrast
- parallel processing
- field programmable gate array
- parallel computing
- dynamic range
- shared memory
- image processing algorithms
- parallel implementation
- massively parallel
- machine learning
- fine grained
- co occurrence
- multiscale
- high level