Enhancing Network Processor Simulation Speed with Statistical Input Sampling.

Jia Yu Jun Yang Shaojie Chen Yan Luo Laxmi N. Bhuyan

Published in: HiPEAC (2005)

Keyphrases

high speed
network simulator
network structure
network model
processor core
real time
statistical analysis
sample size
input patterns
neural network
peer to peer
statistical models
communication networks
simulation model
network management