Low Latency FPGA Implementation of Izhikevich-Neuron Model.
Vitor V. BandeiraVivianne L. CostaGuilherme BontorinRicardo A. L. ReisPublished in: IESS (2015)
Keyphrases
- low latency
- fpga implementation
- neuron model
- spiking neurons
- hardware implementation
- feed forward
- high throughput
- high speed
- virtual machine
- highly efficient
- real time
- feed forward neural networks
- field programmable gate array
- stream processing
- neural network
- transfer function
- artificial neural networks
- image processing