Guilherme Bontorin

Publication Activity (10 Years)

Years Active: 2007-2019
Publications (10 Years): 4

Top Topics

Hardware Architecture

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Elias de Almeida Ramos, Guilherme Bontorin, Ricardo Reis
A New Nonlinear Global Placement for FPGAs: The Chaotic Place. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2019)
Elias de Almeida Ramos, Guilherme Bontorin, Ricardo Reis
A nonlinear placement for FPGAs: The chaotic place. LASCAS (2018)
Luciana Mendes da Silva, Guilherme Bontorin, Ricardo Reis
Reducing the amount of transistors by gate merging. LASCAS (2018)
Priscila C. Holanda, Cezar R. W. Reinbrecht, Guilherme Bontorin, Vitor V. Bandeira, Ricardo A. L. Reis
DHyANA: A NoC-based neural network hardware architecture. ICECS (2016)
Vitor V. Bandeira, Vivianne L. Costa, Guilherme Bontorin, Ricardo A. L. Reis
Low Latency FPGA Implementation of Izhikevich-Neuron Model. IESS (2015)
Roger Caputo-Llanos, Diego Sousa, Marco Terres, Guilherme Bontorin, Ricardo Reis, Marcelo O. Johann
Energy-efficient Level Shifter topology. PATMOS (2015)
Diego Tumelero, Guilherme Bontorin, Ricardo Reis
Overhead for independent net approach for Global Routing. LASCAS (2015)
Marco Terres, Cristina Meinhardt, Guilherme Bontorin, Ricardo Reis
Exploring more efficient architectures for Multiple Dynamic Supply Voltage designs. LASCAS (2014)
Marco Terres, Cristina Meinhardt, Guilherme Bontorin, Ricardo Reis
A novel approach to reduce power consumption in level shifter for Multiple Dynamic Supply Voltage. ICECS (2013)
Guilherme Bontorin, Colin Lopez, Yannick Bornat, Noëlle Lewis, Sylvie Renaud, Mathieu C. Garenne, Gwendal Le Masson
A real-time setup for multisite signal recording and processing in living neural networks. ISCAS (2008)
Guilherme Bontorin, Jean Tomas, Sylvie Renaud
Low noise and low cost neural amplifiers. ICECS (2007)