Low Overhead Design of Power Reconfigurable FPGA with Fine-Grained Body Biasing on 65-nm SOTB CMOS Technology.
Masakazu HiokiHanpei KoikePublished in: IEICE Trans. Inf. Syst. (2016)
Keyphrases
- fine grained
- cmos technology
- power reduction
- power consumption
- low power
- power dissipation
- low overhead
- coarse grained
- low cost
- access control
- single chip
- hardware implementation
- silicon on insulator
- low voltage
- high speed
- massively parallel
- digital signal processing
- design process
- image processing
- signal processing
- protein sequences
- power management
- parallel processing
- data lineage
- object oriented