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A Low-Voltage 1 Mb FRAM in 0.13 µm CMOS Featuring Time-to-Digital Sensing for Expanded Operating Margin.
Masood Qazi
Michael Clinton
Steven Bartling
Anantha P. Chandrakasan
Published in:
IEEE J. Solid State Circuits (2012)
Keyphrases
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low voltage
mixed signal
power line
cmos technology
design considerations
power management
sensor networks
random access memory
power consumption
low power
circuit design
computer vision
machine vision
image sensor
design methodology