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Collaborative gate implementation selection and adaptivity assignment for robust combinational circuits.
Hao He
Jiafan Wang
Jiang Hu
Published in:
ISLPED (2015)
Keyphrases
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cmos technology
circuit design
low power
asynchronous circuits
logic circuits
efficient implementation
low cost
high speed
selection algorithm
high level synthesis
future development
collaborative environment
digital circuits
lateral inhibition
nano scale