Implementation of Low Power and High Speed Dadda Multiplier using Xor-Xnor cell Based Hybrid Logic Full Adder.
B. Ravi KumarP. MunaswamyB. Chandrababu NaikK. SwethaPublished in: ICCCNT (2023)
Keyphrases
- low power
- high speed
- logic circuits
- low cost
- vlsi architecture
- power consumption
- cmos technology
- signal processor
- high power
- single chip
- power dissipation
- delay insensitive
- gate array
- wireless transmission
- digital signal processing
- low power consumption
- vlsi circuits
- hardware implementation
- real time
- frame rate
- ultra low power
- digital circuits
- data flow
- motion estimation