A 65-nm CMOS burst-mode CDR based on a GVCO with symmetric loops.
Keiji KishineHiroshi InoueHiromi InabaMakoto NakamuraAkira TsuchiyaHidetoshi OnoderaHiroaki KatsuraiPublished in: ISCAS (2014)
Keyphrases
- cmos technology
- silicon on insulator
- high speed
- nm technology
- power consumption
- low power
- circuit design
- metal oxide semiconductor
- low cost
- delay insensitive
- vlsi circuits
- parallel processing
- image sensor
- power supply
- database
- power management
- artificial intelligence
- analog vlsi
- mixed mode
- genetic algorithm
- machine learning
- neural network