A 320 MHz CMOS triple 8 bit DAC with on-chip PLL and hardware cursor.
David ReynoldsPublished in: IEEE J. Solid State Circuits (1994)
Keyphrases
- nm technology
- low cost
- cmos technology
- high speed
- low power
- random access memory
- circuit design
- power consumption
- single chip
- analog to digital converter
- image sensor
- chip design
- power dissipation
- cmos image sensor
- analog vlsi
- real time
- low voltage
- random number generator
- clock frequency
- flip flops
- silicon on insulator
- low power consumption
- mixed signal
- hardware and software
- vlsi implementation
- digital signal processing
- signal processor
- memory access
- processor core
- processing capabilities
- parallel processing
- host computer
- eye tracking
- power management
- content addressable memory
- digital camera
- ibm power processor
- xilinx virtex
- digital circuits
- hardware implementation
- design methodology
- fpga device
- max csp
- design considerations
- programmable logic