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A current-mode, 3 V, 20 MHz, 9-bit equivalent CMOS sample-and-hold circuit.

Yasuhiro SugimotoTetsuya Iida
Published in: ASP-DAC (1997)
Keyphrases
  • high speed
  • low voltage
  • cmos technology
  • circuit design
  • random access memory
  • analog vlsi
  • flip flops
  • nm technology
  • low power
  • delay insensitive
  • power consumption
  • data sets
  • control system
  • low cost