A CMOS 8-Bit 1.6-GS/s DAC With Digital Random Return-to-Zero.

Wei-Hsin Tseng Jieh-Tsorng Wu Yung-Cheng Chu

Published in: IEEE Trans. Circuits Syst. II Express Briefs (2011)

Keyphrases

analog to digital converter
circuit design
random access memory
cmos image sensor
low power
mixed signal
low cost
real time
power consumption
genetic algorithm
metadata
image sensor
vlsi circuits