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A Medium-Grain Reconfigurable Architecture for DSP: VLSI Design, Benchmark Mapping, and Performance.
Mitchell J. Myjak
José G. Delgado-Frias
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2008)
Keyphrases
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vlsi design
reconfigurable architecture
systolic array
data flow
parallel architecture
design methodology
digital signal processing
real world
signal processing
neural network
decision making
rough sets
distributed systems