Design of low power comparator-reduced hybrid ADC.
Hasan MolaeiKhosrow HajsadeghiAta KhoramiPublished in: Microelectron. J. (2018)
Keyphrases
- low power
- single chip
- power consumption
- high speed
- low cost
- vlsi architecture
- low power consumption
- gate array
- cmos technology
- logic circuits
- mixed signal
- power dissipation
- digital signal processing
- ultra low power
- power reduction
- vlsi circuits
- cmos image sensor
- real time
- design considerations
- sigma delta
- analog to digital converter
- efficient implementation