Antenna Packing in Low-Power Systems: Communication Limits and Array Design.
Tarik MuharemovicAshutosh SabharwalBehnaam AazhangPublished in: IEEE Trans. Inf. Theory (2008)
Keyphrases
- low power
- single chip
- power consumption
- high speed
- low cost
- low power consumption
- logic circuits
- vlsi architecture
- digital signal processing
- ultra low power
- gate array
- design process
- power reduction
- digital circuits
- computing systems
- power dissipation
- high power
- mixed signal
- vlsi circuits
- computer systems
- design considerations
- communication networks
- signal to noise ratio
- delay insensitive
- image processing