Suitable compensation circuits for on-chip interference reduction in neural tripolar recordings.
Clemens EderSyeda Sabeeka ZehraMajid ZamaniAndreas DemosthenousPublished in: ICECS (2013)
Keyphrases
- analog vlsi
- high speed
- circuit design
- chip design
- neural network
- power dissipation
- lateral inhibition
- random access memory
- cmos technology
- reduction method
- bio inspired
- low cost
- neural model
- network architecture
- vlsi implementation
- programmable logic
- power reduction
- high density
- logic synthesis
- multipath
- end to end
- signal processing