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A 80Gb/s/pin Single-Ended PAM-4 Transmitter With an Edge Boosting Auxiliary Driver and a 4-Tap FFE in 28-nm CMOS.

Daewon RhoJae-Koo ParkSeung-Jae YangWoo-Young Choi
Published in: A-SSCC (2023)
Keyphrases
  • high speed
  • power supply
  • cmos technology
  • learning algorithm
  • low cost
  • power consumption
  • neural network
  • feature selection
  • decision trees
  • edge detection
  • vlsi circuits