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Circuits with arbitrary gates for random operators
Stasys Jukna
Georg Schnitger
Published in:
CoRR (2010)
Keyphrases
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logic circuits
low power
high speed
morphological operators
tunnel diode
lower bound
case study
website
aggregation operators
artificial neural networks
data sets
uniformly distributed
multi valued
cmos technology
general conditions
information systems
delay insensitive
data mining