A 2.64GHz wide range low power DLL-based frequency multiplier with CML circuits using adaptive body bias.
Chih-Hsing LinChing-Te ChiuPublished in: ICECS (2008)
Keyphrases
- low power
- high speed
- wide range
- logic circuits
- power consumption
- cmos technology
- vlsi circuits
- low cost
- power reduction
- power dissipation
- delay insensitive
- single chip
- mixed signal
- clock frequency
- wireless transmission
- vlsi architecture
- high power
- low power consumption
- real time
- digital signal processing
- low frequency
- image sensor
- video sequences
- gate array