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Power-delay product minimization in high-performance 64-bit carry-select adders.
Amaury Nève
Helmut Schettler
Thomas Ludwig
Denis Flandre
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2004)
Keyphrases
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power dissipation
bit parallel
power consumption
objective function
pattern matching
selection algorithm
life cycle
scientific computing
genetic algorithm
search engine
image processing
cost effective
low power
high reliability
product information
absolute difference