Login / Signup

Scaling Up Loop Pipelining for High-Level Synthesis: A Non-iterative Approach.

Leandro de Souza RosaVanderlei BonatoChristos-Savvas Bouganis
Published in: FPT (2018)
Keyphrases
  • high level synthesis
  • parallel architecture
  • parallel processing
  • feedback loop
  • design space exploration
  • artificial intelligence
  • image analysis
  • scheduling problem
  • parallel computing