Designing a 9.3μW Low-Power Time-to-Digital Converter (TDC) for a Time Assisted SAR ADC.
Rodrigo N. WuerdigBruno CanalTiago R. BalenSergio BampiPublished in: SBCCI (2022)
Keyphrases
- low power
- analog to digital converter
- mixed signal
- low cost
- power consumption
- high speed
- image sensor
- vlsi circuits
- single chip
- high power
- digital signal processing
- logic circuits
- cmos image sensor
- data conversion
- low power consumption
- synthetic aperture radar
- gate array
- wireless transmission
- sar images
- vlsi architecture
- cmos technology
- multi channel
- wide dynamic range
- image reconstruction
- low voltage