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VLSI module placement based on rectangle-packing by the sequence-pair.
Hiroshi Murata
Kunihiro Fujiyoshi
Shigetoshi Nakatake
Yoji Kajitani
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1996)
Keyphrases
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maximum profit
pairwise
vlsi design
signal processing
high speed
packing problem
hough transform
long sequences
machine learning
case study
bayesian networks
low cost
similarity scores
pseudorandom