A low-power CDR using dynamic CML latches and V/I converter merged with XOR for half-rate linear phase detection.
Taek-Joon AhnKyung-Sub SonYong-Sung AhnJin-Ku KangPublished in: IEICE Electron. Express (2014)
Keyphrases
- low power
- low cost
- power consumption
- high speed
- wireless transmission
- single chip
- energy dissipation
- vlsi architecture
- single phase
- digital signal processing
- high power
- low power consumption
- gate array
- transfer function
- logic circuits
- image processing
- image sensor
- power reduction
- signal processor
- cmos technology
- mixed signal
- image processing algorithms
- vlsi circuits
- ultra low power