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Logical Effort Based Design Exploration of 64-bit Adders Using a Mixed Dynamic-CMOS/Threshold-Logic Approach.

Peter CelinskiSaid F. Al-SarawiDerek AbbottSorin CotofanaStamatis Vassiliadis
Published in: ISVLSI (2004)
Keyphrases
  • logical operations
  • chip design
  • circuit design
  • user interface
  • case study
  • random access memory
  • logic programming
  • dynamic environments
  • design methodology