A versatile low-jitter PLL in 90-nm CMOS for SerDes transmitter clocking.
Alvin Leng Sun LokeRobert K. BarnesTin Tin WeeMichael M. OshimaCharles E. MooreRonald R. KennedyJim O. BarnesRobert A. ZimmerKari L. AraveH. Herman M. PangTom E. CynkarAaron M. VolzJim R. PfiesterR. J. MartinRobert H. MillerDavid A. HoodGordon W. MotleyEd J. RojasTom M. WalleyMichael J. GilsdorfPublished in: CICC (2005)