Low Power FPGA-SoC Design Techniques for CNN-based Object Detection Accelerator.
Heekyung KimKen ChoiPublished in: UEMCON (2019)
Keyphrases
- low power
- single chip
- low power consumption
- low cost
- high speed
- gate array
- power consumption
- digital signal processing
- power reduction
- object detection
- logic circuits
- vlsi architecture
- wireless transmission
- power dissipation
- cmos technology
- mixed signal
- vlsi circuits
- high power
- field programmable gate array
- cmos image sensor
- design process
- hardware design
- ultra low power
- computer vision
- embedded systems
- signal processing
- circuit design
- cellular neural networks
- image sensor
- parallel implementation
- face detection
- nm technology
- image processing