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Boolean Satisfiability-Based Routing and Its Application to Xilinx UltraScale Clock Network.

Henri FraisseAbhishek JoshiDinesh GaitondeAlireza Kaviani
Published in: FPGA (2016)
Keyphrases
  • boolean satisfiability
  • high speed
  • branch and bound algorithm
  • sat solving
  • randomly generated
  • fpga device
  • learning algorithm
  • combinatorial problems
  • sat instances
  • integer linear programming