Low-power gated and buffered clock network construction.

Wei-Chung Chao Wai-Kei Mak

Published in: ACM Trans. Design Autom. Electr. Syst. (2008)

Keyphrases

low power
power consumption
high speed
low cost
single chip
power saving
low power consumption
high power
logic circuits
wireless transmission
vlsi architecture
cmos technology
digital signal processing
power reduction
real time
image sensor
vlsi circuits
nm technology
gate array
energy dissipation