A 3, times, 5-Gb/s Multilane Low-Power 0.18-muhbox m CMOS Pseudorandom Bit Sequence Generator.
Kin-Joe ShamShubha BommalingaiahnapallyaMahmoud Reza AhmadiRamesh HarjaniPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2008)
Keyphrases
- pseudorandom
- low power
- high speed
- power consumption
- random number
- low cost
- uniformly distributed
- random numbers
- secret key
- single chip
- cmos technology
- high power
- ultra low power
- low power consumption
- image sensor
- vlsi circuits
- logic circuits
- digital signal processing
- delay insensitive
- vlsi architecture
- wireless transmission
- mixed signal
- power reduction
- focal plane
- power dissipation
- nm technology
- gate array
- smart card