Low-power null convention logic design based on modified gate diffusion input technique.
Prashanthi MetkuRamu SevaKyung Ki KimYong-Bin KimMinsu ChoiPublished in: ISOCC (2017)
Keyphrases
- low power
- logic circuits
- cmos technology
- low cost
- power consumption
- single chip
- high speed
- low power consumption
- vlsi architecture
- nm technology
- gate array
- digital signal processing
- mixed signal
- image sensor
- design process
- high power
- low voltage
- design considerations
- power reduction
- general purpose
- delay insensitive
- video data
- ultra low power