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Healing of DSP Circuits Under Power Bound Using Post-Silicon Operand Bitwidth Truncation.
Seetharam Narasimhan
Keerthi Kunaparaju
Swarup Bhunia
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2012)
Keyphrases
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high speed
upper bound
cmos technology
power dissipation
digital signal processing
chip design
power consumption
worst case
lower bound
signal processing
low power
power reduction
low cost
error bounds
digital circuits
objective function
power management
b tree
analog circuits
logic synthesis
silicon on insulator