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Efficient DVB-T2 decoding accelerator design by time-multiplexing FPGA resources.
Michael Feilen
Matthias Ihmig
Christian Schwarzbauer
Walter Stechele
Published in:
FPL (2012)
Keyphrases
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hardware design
field programmable gate array
fpga implementation
real time
case study
resource allocation
resource management
hardware implementation
single chip
hardware architecture
video decoder
multimedia
design process
efficient implementation
gate array