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Low-Power SRAM Cell and Array Structure in Aerospace Applications: Single-Event Upset Impact Analysis.
K. Gavaskar
P. Sivaranjani
S. Elango
G. Nirmal Raja
Published in:
Wirel. Pers. Commun. (2023)
Keyphrases
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low power
power consumption
high speed
low cost
impact analysis
image sensor
single chip
cmos technology
digital signal processing
logic circuits
source code
power reduction
structural properties
low power consumption
vlsi circuits
real time
dependency analysis
open source
extreme events
gate array