Tunable CMOS Delay Gate With Improved Matching Properties.

Przemyslaw Mroszczyk Piotr Dudek

Published in: IEEE Trans. Circuits Syst. I Regul. Pap. (2014)

Keyphrases

matching algorithm
high speed
low cost
structural properties
graph matching
real time
neural network
similarity measure
pattern matching
image matching
power consumption
low power
desirable properties
matching process
nm technology