A low power and ultra high reliability LDPC error correction engine with Digital Signal Processing for embedded NAND Flash Controller in 40nm COMS.
Wei LinShao-Wei YenYu-Cheng HsuYu-Hsiang LinLi-Chun LiangTien-Ching WangPei-Yu ShihKuo-Hsin LaiKuo-Yi ChengChun-Yen ChangPublished in: VLSIC (2014)
Keyphrases
- low power
- digital signal processing
- high reliability
- error correction
- low cost
- low power consumption
- embedded systems
- high speed
- ldpc codes
- low density parity check
- cmos technology
- channel coding
- real time
- flash memory
- error detection
- turbo codes
- high precision
- error correcting
- vlsi architecture
- power consumption
- data hiding
- field programmable gate array
- watermarking scheme
- image processing
- error resilience
- signal processing
- channel capacity