A Systolic Array Based GTD Processor With a Parallel Algorithm.
Chia-Hsiang YangChun-Wei ChouChia-Shen HsuChiao-En ChenPublished in: IEEE Trans. Circuits Syst. I Regul. Pap. (2015)
Keyphrases
- parallel algorithm
- systolic array
- parallel architecture
- shared memory
- reconfigurable architecture
- data flow
- parallel computation
- parallel programming
- discovery of association rules
- distributed memory
- cluster of workstations
- parallel implementations
- binary search trees
- parallel computing
- parallel processing
- medial axis transform
- distributed systems
- computer vision