Orderings and partition of PDE computations for a fixed-size VLSI architecture.

Elena P. Papadopoulou Yiannis G. Saridakis Theodore S. Papatheodorou

Published in: FJCC (1987)

Keyphrases

fixed size
vlsi architecture
vlsi implementation
low complexity
sliding window
variable size
low power
real time
partial differential equations
window size
level set
low cost
image denoising
high speed
power consumption
small image patches
image enhancement
signal processing
multiresolution
data streams