Utility Aware Snoozy Caches for Energy Efficient Chip Multi-Processors.
Ashwini A. KulkarniShounak ChakrabortyShrinivas P. MahajanHemangee K. KapoorPublished in: ACM Great Lakes Symposium on VLSI (2018)
Keyphrases
- energy efficient
- multi core architecture
- wireless sensor networks
- energy consumption
- memory access
- sensor networks
- multithreading
- parallel algorithm
- data gathering
- base station
- high speed
- energy efficiency
- multi core processors
- parallel processors
- low cost
- routing algorithm
- routing protocol
- data dissemination
- sensor nodes
- data access
- parallel computing
- access latency