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Single chip 3D rendering engine integrating embedded DRAM frame buffer and Hierarchical Octet Tree (HOT) array processor with bandwidth amplification.
Yong-Ha Park
Seon-Ho Han
Hoi-Jun Yoo
Published in:
ASP-DAC (2001)
Keyphrases
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single chip
low power
low cost
image sensor
cmos technology
real time
high speed
dynamic programming
image data
digital camera