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Making defect avoidance nearly invisible to the user in wafer scale field programmable gate arrays.

Glenn H. ChapmanBenoit Dufort
Published in: DFT (1996)
Keyphrases
  • field programmable gate array
  • massively parallel
  • hardware implementation
  • embedded systems
  • computer vision
  • end users
  • integrated circuit
  • hardware design
  • hardware architecture
  • programmable logic