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BIST controlled variable sense amp timing for 90nm embedded SRAM.

Ciaran J. BrennanSteven EustisJohn GossA. HumphreyMichael OuelletteJeremy RowlandMichael Fragano
Published in: CICC (2004)
Keyphrases
  • dynamic random access memory
  • power consumption
  • data transmission
  • cmos technology
  • data sets
  • real world
  • embedded systems
  • real time
  • data mining
  • multiscale
  • computer networks
  • computer controlled