Automated debugging of counterexamples in formal verification of pipelined microprocessors.
Miroslav N. VelevPing GaoPublished in: ASP-DAC (2012)
Keyphrases
- formal verification
- program slicing
- model checking
- bounded model checking
- automated verification
- symbolic model checking
- semi automated
- model checker
- data flow
- computing power
- personal computer
- parallel programming
- functional verification
- computer systems
- instruction set
- computer architecture
- application specific
- orders of magnitude