A Low Power Frequency Multiplication Technique for ZigBee Transciever.

Jagdish Nayayan Pandey Sudhir S. Kudva Bharadwaj Amrutur

Published in: VLSI Design (2007)

Keyphrases

low power
high speed
power consumption
low cost
single chip
low power consumption
digital signal processing
wireless transmission
vlsi architecture
high power
real time
gate array
cmos technology
power reduction
mixed signal
vlsi circuits
delay insensitive
general purpose
signal processor
wireless sensor networks