A 10Gbps CDR based on phase interpolator for source synchronous receiver in 65nm CMOS.

Shijie Hu Chen Jia Ke Huang Chun Zhang Xuqiang Zheng Zhihua Wang

Published in: ISCAS (2012)

Keyphrases

cmos technology
high speed
low cost
power consumption
silicon on insulator
circuit design
low power
metal oxide semiconductor
nm technology
preprocessing phase
analog vlsi
learning phase
training phase
power supply
phase unwrapping
low voltage
delay insensitive
image processing