Ratiometric Artefact Reduction in Low Power, Discrete-Time, Reflective Photoplethysmography.

James Alwyn Cameron Patterson Guang-Zhong Yang

Published in: BSN (2010)

Keyphrases

low power
power consumption
low cost
high speed
power reduction
high power
single chip
low power consumption
wireless transmission
digital signal processing
vlsi architecture
cmos technology
logic circuits
signal processing
vlsi circuits
mixed signal
delay insensitive
nm technology
gate array
ultra low power