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Low voltage, high performance first and third generation current conveyor in 0.18μm CMOS.
Chun-Chieh Chen
Kai-Yao Lin
Nan-Ku Lu
Published in:
APCCAS (2008)
Keyphrases
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low voltage
design considerations
power line
random access memory
power management
cmos technology
power consumption
low power
multimedia
learning environment
leakage current