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An Integrated Approach of Variable Ordering and Logic Mapping into LUT-Array-Based PLD.
Tomonori Izumi
Shin'ichi Kouyama
Hiroyuki Ochi
Yukihiro Nakamura
Published in:
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2005)
Keyphrases
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variable ordering
branch and bound algorithm
binary decision diagrams
conflict directed
propositional satisfiability
logic programming
automated reasoning
max sat
lower bound
forward checking
knowledge base
data streams
special case
modal logic
boolean functions
mapping function