FPGA Design Experiences Using the CSELT VIP (TM) Library.

Enrica Filippi A. Montanaro M. Paolini Maura Turolla

Published in: FPGA (1999)

Keyphrases

real time
hardware design
database
case study
single chip
evolutionary algorithm
current status
signal processing
computer aided
verilog hdl
design methodology
hardware implementation
engineering design
design process
low cost
user interface
expert systems
neural network