Low voltage low power high-speed BiCMOS multiplier.
Kuo-Hsing ChengYu-Kwang YehaFarn-Sou LianPublished in: ICECS (1998)
Keyphrases
- low power
- high speed
- mixed signal
- low voltage
- cmos technology
- vlsi circuits
- single chip
- power line
- low cost
- low power consumption
- power consumption
- digital signal processing
- logic circuits
- vlsi architecture
- frame rate
- hardware implementation
- real time
- image sensor
- hardware and software
- power reduction
- efficient implementation
- signal processing
- image sequences